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147 Commits

Author SHA1 Message Date
Admiral H. Curtiss
f19651e49b Merge pull request #11025 from AdmiralCurtiss/hle-printf 
HLE_OS: Manually handle printfs from emulated software to prevent emulated software from crashing Dolphin with an invalid printf formatting string.
 2023-08-20 01:31:49 +02:00
MikeIsAStar
0bb5c88a22 Retrieve page table information from the data cache 
Thanks to @mkwcat for identifying the problematic code.
 2023-08-15 12:44:55 -04:00
Admiral H. Curtiss
7f29f0398c MMU: Add a HostGetU16String() function for wide strings used by emulated software. 2023-07-29 15:11:00 +02:00
Admiral H. Curtiss
23843583bf PowerPC: Refactor to class, move to System. 2023-04-09 21:48:37 +02:00
Admiral H. Curtiss
18f8ae37ab PowerPC/Expression: Pass System to EvaluateCondition(). 2023-04-05 20:09:31 +02:00
Admiral H. Curtiss
8dabd1a025 PowerPC/MMU: Refactor to class, move to System. 2023-03-28 03:47:51 +02:00
Mai
98fad9004b Merge pull request #11698 from AdmiralCurtiss/mmu-comments 
PowerPC/MMU: Clean up old comments.
 2023-03-27 10:32:19 -04:00
Admiral H. Curtiss
d7fabf37d6 PowerPC/MMU: Clean up old comments. 2023-03-26 15:19:48 +02:00
Admiral H. Curtiss
9217a9eba4 JitInterface: Refactor to class, move to System. 2023-03-26 14:38:07 +02:00
Admiral H. Curtiss
3006c23c85 Core/CPUThreadGuard: Fetch System from Guard. 2023-03-13 18:13:20 +01:00
Admiral H. Curtiss
3b364c5c16 HW/CPU: Refactor to class, move to System. 2023-03-08 12:23:37 +01:00
Minty-Meeo
bf079d6d3a [[unlikely]] ASSERT 
and other ASSERT usage changes
 2023-03-02 19:54:15 -06:00
JosJuice
7cecb28bdf DolphinQt: Properly lock CPU before accessing emulated memory 
This fixes a problem I was having where using frame advance with the
debugger open would frequently cause panic alerts about invalid addresses
due to the CPU thread changing MSR.DR while the host thread was trying
to access memory.

To aid in tracking down all the places where we weren't properly locking
the CPU, I've created a new type (in Core.h) that you have to pass as a
reference or pointer to functions that require running as the CPU thread.
 2023-02-12 11:27:50 +01:00
Admiral H. Curtiss
ba1b624e1b PowerPC: Remove MSR macro. 2023-01-27 15:22:42 +01:00
Admiral H. Curtiss
2f3187eba9 PowerPC: Remove NPC macro. 2023-01-27 15:22:41 +01:00
Admiral H. Curtiss
be8d0b76ca PowerPC: Remove PC macro. 2023-01-27 15:22:41 +01:00
Admiral H. Curtiss
31483e492e PowerPC: Parametrize HID4 macro. 2023-01-27 15:22:40 +01:00
Admiral H. Curtiss
49eeb986c6 PowerPC: Parametrize HID0 macro. 2023-01-27 15:22:40 +01:00
Admiral H. Curtiss
21c29bad6b Merge pull request #11407 from AdmiralCurtiss/globals-gpfifo 
HW/GPFifo: Refactor to class, move to Core::System.
 2023-01-09 17:09:48 +01:00
Admiral H. Curtiss
eeeab3c3be Merge pull request #11183 from TheLordScruffy/write-back-cache 
Implement PowerPC data cache
 2023-01-09 17:09:32 +01:00
Admiral H. Curtiss
fbcaf83d30 HW/GPFifo: Refactor to class, move to Core::System. 2023-01-06 05:33:21 +01:00
Admiral H. Curtiss
74e1577a2c HW/ProcessorInterface: Refactor to class, move to Core::System. 2023-01-04 03:00:10 +01:00
TheLordScruffy
9d39647f9e Fix PPC cache code formatting 2023-01-02 02:33:57 -05:00
JosJuice
cf16f49068 PowerPC: Fix theoretically possible infinite loop in WriteToHardware 
`em_address + size` can overflow and become 0. It shouldn't happen with
the kinds of memory mappings games use in practice, though.
 2022-12-25 12:29:13 +01:00
JosJuice
454537d53e Replace BitUtils with C++20: RotateLeft/RotateRight 
Now that we've flipped the C++20 switch, let's start making use of
the nice new <bit> header.

I'm planning on handling this move away from BitUtils.h incrementally
in a series of PRs. There may be a few functions remaining in
BitUtils.h by the end that C++20 doesn't have any equivalents for.
 2022-12-11 08:59:18 +01:00
TheLordScruffy
e97d380437 Implement PPC write-back data cache 2022-12-08 18:18:32 -05:00
Admiral H. Curtiss
839db591d9 HW/Memmap: Refactor Memory to class, move to Core::System. 2022-12-03 13:27:02 +01:00
dreamsyntax
78c6819f5e Core: pause on panic handler option 2022-09-02 13:22:32 -07:00
Pokechu22
97412553f9 Add a more detailed comment about SPR_WPAR's BNE bit 2022-07-22 22:22:34 -07:00
Pokechu22
c06f203e98 MMU: Clarify masking on gather pipe address 2022-07-22 22:22:34 -07:00
Pokechu22
1c833ddc3c Create constant for GPFifo physical address 2022-07-22 22:22:33 -07:00
JosJuice
b6b7030482 PowerPC: Add HW_PAGE_MASK constant 2022-05-07 19:37:44 +02:00
JosJuice
ed40b43960 PowerPC: Reorder code in ReadFromHardware 
This refactorization is done just to match the order that I made
WriteToHardware use in 543ed8a. For WriteToHardware, it's important that
things like MMIO and gather pipe are handled before we reach a special
piece of code that only should get triggered for writes that hit memory
directly, but for ReadFromHardware we don't have any code like that.
 2022-05-07 15:52:35 +02:00
JosJuice
3b3c60dc4c PowerPC: Check page crossing for non-translated reads 
This fixes a problem where Dolphin could crash if a non-translated
read crossed the end of a physical memory region.

The same change was applied to WriteToHardware in ecbce0a.
 2022-05-07 15:41:21 +02:00
Admiral H. Curtiss
92d2fd9d5f Config: Port MMU setting to new config system. 2022-01-09 21:29:12 +01:00
Scott Mansell
b997048cfe Merge pull request #10142 from aldelaro5/gdb-stub-rework 
Rework the entire logic of the GDB stub
 2021-10-24 01:51:29 +13:00
aldelaro5
1b92f81379 GDBStub: Refactor the whole code 2021-10-21 08:26:50 -04:00
aldelaro5
94a0f416eb GDBStub: remove the cmake option and the ifdefs 2021-10-21 08:26:42 -04:00
aldelaro5
7d3ea4c3a1 GDBStub: rework the breakpoint and the control logic 2021-10-21 08:26:28 -04:00
Pokechu22
525e6b2194 MMU: Replace TryReadResult and TryWriteResult with std::optional 2021-10-13 11:44:28 -07:00
Pokechu22
673f886a7e MMU: Replace uses of cassert with Common/Assert.h 2021-10-13 11:44:28 -07:00
aldelaro5
39569ed1f8 Remove unecessary include of the gdb stub 2021-09-29 12:54:18 -04:00
Léo Lam
c3dadd140b Merge pull request #10074 from lioncash/pte 
MMU: Tidy up PTE-related code
 2021-08-31 19:17:08 +02:00
Lioncash
029aff0741 MMU: Remove now-unused defines 
Now that we're using register unions where applicable, we can remove
these defines, since they're now unused.
 2021-08-31 12:18:28 -04:00
Lioncash
7a6b63b309 MMU: Don't truncate 64-bit values when calling Memcheck() 
Previously in Read_U64 and Write_U64 the value that was read or written
would be truncated to a 32-bit value before being passed off to the
memcheck handler, which can result in incorrect values being logged out.
 2021-08-31 11:39:13 -04:00
Lioncash
a8ebca4fc6 MMU: Invert conditionals in Memcheck() 
Lets us unindent code a little bit.
 2021-08-31 11:30:57 -04:00
Lioncash
ee40b640d3 MMU: Make use of UPTE_Lo and UReg_SR in TranslatePageAddress() 
Allows us to get rid of a bit of masking in exchange for stating the
bits being accessed or written to directly.
 2021-08-31 10:52:52 -04:00
Lioncash
75840f62ff MMU: Make use of UReg_SDR1 in SDRUpdated() 
Lets us simplify SDRUpdated() a little bit.

This also fixes the layout of UReg_SDR1. Turns out this struct has been
incorrect (from a little-endian perspective) the entire time and went
unnoticed, since the union was never used.
 2021-08-31 10:20:56 -04:00
Lioncash
1c776d8c1a MMU: Move invalidation logic into the TLBEntry struct 
Puts the invalidation logic in one place and lets us tidy up
InvalidateTLBEntry a little.
 2021-08-31 10:04:44 -04:00
Lioncash
3216040bfe MMU: Remove implicit sign conversions and truncation in UpdateTLBEntry 
These are trivial to resolve.

Converting the structure member into a u32 results in no increase in
structure size, as it's making use of the three extra padding bits in
the structure.
 2021-08-31 10:00:18 -04:00