3245 Commits

Author	SHA1	Message	Date
mitaclaw	0f36654d2b	PPCSymbolDB: Eliminate Redundant Member ... This can be accessed through the CPUThreadGuard.	2024-03-06 21:44:53 -08:00
mitaclaw	fd8f2c7822	JitArm64: Install BranchWatch	2024-02-26 19:38:27 -08:00
mitaclaw	7cccedca1e	Jit64: Install BranchWatch	2024-02-26 19:38:27 -08:00
mitaclaw	2aa250a68a	Interpreter: Install BranchWatch	2024-02-26 19:38:27 -08:00
mitaclaw	67f60bec7e	PowerPC: Implement BranchWatch ... This new component can track code paths by watching branch hits.	2024-02-26 19:38:27 -08:00
Mai	30fdf25f8f	Merge pull request #12542 from AdmiralCurtiss/system-sconfig ... Migrate m_is_mios and bWii from SConfig to System.	2024-01-31 09:57:17 -05:00
Admiral H. Curtiss	9a3e770c23	Migrate SConfig::bWii to System.	2024-01-31 12:54:07 +01:00
Mai	e0828815e7	Merge pull request #12540 from mitaclaw/encode-reg-to-64 ... Add Missing EncodeRegTo64 in JitArm64::dcbx	2024-01-30 13:08:03 -05:00
mitaclaw	45481620b8	Add Missing EncodeRegTo64 in JitArm64::dcbx ... ARM64FloatEmitter::ABI_PushRegisters expects an XReg temporary, not a WReg.	2024-01-30 03:06:32 -08:00
Admiral H. Curtiss	e740e32562	Merge pull request #12522 from lioncash/ppcanalyst ... PPCAnalyst: Merge duplicate expression in ReorderInstructionsCore()	2024-01-26 20:29:16 +01:00
Admiral H. Curtiss	460ab609d0	Merge pull request #12524 from lioncash/memb ... Jit64AsmCommon: Remove redundant m_jit member from CommonAsmRoutines	2024-01-26 18:53:44 +01:00
Lioncash	4ccc5178a6	PowerPC: Use #ifdef instead of #if for platform testing ... This way we don't assume these symbols are always defined.	2024-01-23 16:47:43 -05:00
Lioncash	f695ae5730	JitInterface: Use #ifdef instead of #if for platform testing ... \#if assumes the symbols will always be defined, but they aren't depending on the platform.	2024-01-23 16:42:36 -05:00
Lioncash	b06e1880b6	Jit64AsmCommon: Remove redundant m_jit member from CommonAsmRoutines ... We pass a JIT instance all the way down to EmuCodeBlock, which is accessible under protected as well, so this isn't really necessary.	2024-01-23 16:27:02 -05:00
Lioncash	7ef0262f8a	PPCAnalyst: Merge duplicate expression in ReorderInstructionsCore() ... The type checking is duplicated here, which makes this seem a little weird, so we can get rid of it.	2024-01-23 16:08:24 -05:00
Lioncash	9f82efa3e2	Jit64/JitRegCache: Simplify GetAllocationOrder() ... Given we have fixed allocation orders, we can just directly return a span instead of a pointer and a size via an out parameter. Makes it a little more convenient, since we get both pieces of info at once, and also have the ability to iterate directly off the span out of the box.	2024-01-23 11:03:59 -05:00
Mai	6aacbc4c35	Merge pull request #12488 from JosJuice/jitarm64-psq-stxx-w0 ... JitArm64: Remove unnecessary locking of W0 in psq_stXX	2024-01-15 15:14:59 -05:00
Admiral H. Curtiss	42d61cfc4c	Core/HW/MMIO: Pass System through Read() and Write().	2024-01-12 08:28:01 +01:00
JosJuice	b972329ed0	PowerPC: Add access size parameter to MMU::IsOptimizableRAMAddress ... For correctness, we need to check not only the start address of the memory access but also the end address.	2024-01-10 18:17:45 +01:00
JosJuice	f2145c91e7	JitArm64: Update register comments in psq_lXX/psq_stXX ... This was also overlooked in 166bd87f70.	2024-01-07 23:01:38 +01:00
JosJuice	d94b00ec36	JitArm64: Remove unnecessary locking of W0 in psq_stXX ... It seems like I made a mistake in 166bd87f70. Locking W0 when jo.memcheck is true is only necessary for load instructions, not store instructions.	2024-01-07 22:59:51 +01:00
JosJuice	696a6defd2	Merge pull request #12472 from mitaclaw/arm64-flush-mode ... Arm64RegCache: Use FlushMode everywhere	2024-01-07 18:45:25 +01:00
Admiral H. Curtiss	07c035e659	Core/SystemTimers: Refactor to class, move to System.	2024-01-04 23:35:19 +01:00
Admiral H. Curtiss	fd1a261e73	Merge pull request #12470 from JosJuice/jitarm64-low-dcbz-for-real ... JitArm64: Don't fall back to interpreter on low DCBZ hack	2024-01-01 23:16:30 +01:00
Admiral H. Curtiss	6e3a2324a4	Merge pull request #12464 from JosJuice/jit-isi-membase ... Jit: Reload RMEM/MEM_REG on ISI exception	2024-01-01 22:09:05 +01:00
Tilka	07df4ff16e	Merge pull request #12471 from mitaclaw/flush-gpr-arm-bug ... Fix Logic Inefficiency in Arm64GPRCache::FlushRegisters	2024-01-01 00:46:34 +01:00
mitaclaw	4805b02893	Arm64RegCache: Use FlushMode everywhere	2023-12-31 02:09:56 -08:00
mitaclaw	01e534a681	Fix Logic Inefficiency in Arm64GPRCache::FlushRegisters ... This was introduced in 6a9f565ac4.	2023-12-30 23:44:27 -08:00
JosJuice	465f17a882	PowerPC: Add constants for the two TLB indices ... Just for readability.	2023-12-30 14:31:05 +01:00
JosJuice	684b3dfd4a	JitArm64: Don't fall back to interpreter on low DCBZ hack ... I missed this in 16eb188f1d.	2023-12-30 14:18:49 +01:00
JosJuice	8fcf9969eb	Jit: Reload RMEM/MEM_REG on ISI exception ... Aims to fix https://bugs.dolphin-emu.org/issues/13444.	2023-12-27 16:39:00 +01:00
Tilka	01340d7f8d	Merge pull request #12442 from lioncash/hle ... Core/HLE/HLE: Remove global system accessors	2023-12-20 12:41:09 +00:00
Lioncache	c0b7e9cd94	Core/HLE/HLE: Remove global system accessor from ExecuteFromJIT() ... We can just pass in our system instance via the ABI function helpers.	2023-12-18 19:11:52 -05:00
Lioncache	f4277a901a	Core/HLE/HLE: Remove global system accessors ... We can get rid of the global system accessors by requiring passing in relevant state that the function needs and making callsites do the work. This *does* add a global accessor to the PPCAnalyzer, however, this already has global accessors present elsewhere within its code, so they can be removed all at once in a follow up change.	2023-12-18 19:11:49 -05:00
Lioncache	75ec350dc4	Core/Debugger_SymbolMap: Remove redundant system parameters from interface ... The CPU thread guard already allows access to the system instance. We can remove the system parameter to reduce rendundancy here.	2023-12-18 15:46:22 -05:00
Mai	51a44aa5d2	Merge pull request #12431 from JosJuice/jitarm64-rlwnmx-call-rlwinmx ... JitArm64: Call rlwinmx implementation from rlwnmx with imm b	2023-12-17 15:18:00 -05:00
mitaclaw	ca443d7f89	Fix Windows ARM64 debug build errors ... Jit.cpp : Potentially uninitialized local pointer variable 'host_address_after_return' used in a DEBUG_ASSERT on line 470. dolphin-emu.sln : A copy-paste error.	2023-12-17 11:31:28 -08:00
JosJuice	26de2a7feb	JitArm64: Call rlwinmx implementation from rlwnmx with imm b ... This way we get some additional optimized cases for rlwnmx with imm b.	2023-12-17 17:00:41 +01:00
Mai	e6c85bf8f0	Merge pull request #12428 from JosJuice/jitarm64-rlwinmx-shift-only ... JitArm64: Add rlwinmx case for only shifting	2023-12-17 10:45:59 -05:00
JosJuice	f5951c9f45	JitArm64: Use 64-bit register for address in mtsrin ... Fixes a regression from d34d3bd513 that, depending on the host memory layout, could cause either a host crash or a guest crash when running F-Zero GX.	2023-12-16 20:27:58 +01:00
JosJuice	b5a95b7804	JitArm64: Add rlwinmx case for only shifting ... Small optimization.	2023-12-16 17:34:33 +01:00
Admiral H. Curtiss	190c4e8cda	Merge pull request #12427 from JosJuice/jitarm64-msr-updated-logical-imm ... JitArm64: Fix MSRUpdated(ARM64Reg) with FEATURE_FLAG_PERFMON set	2023-12-16 17:22:23 +01:00
JosJuice	e0eb4ef5bc	JitArm64: Use enum class for LogicalImm size parameter ... This should prevent issues like the one fixed in the previous commit from happening again.	2023-12-16 16:48:26 +01:00
JosJuice	064b23b25b	JitArm64: Fix MSRUpdated(ARM64Reg) with FEATURE_FLAG_PERFMON set ... The second parameter of the LogicalImm constructor is the size, not the first.	2023-12-16 12:07:11 +01:00
Admiral H. Curtiss	c1957ac169	JitCommon: Fix feature_flags truncation in index calculation.	2023-12-12 21:16:29 +01:00
Lioncash	0e51c0f8fc	JitArm64_RegCache: Resolve -Wsign-compare warning	2023-12-11 18:15:50 -05:00
Lioncash	4c3a5eb1c5	JitArm64_SystemRegisters: Resolve -Wsign-compare warning	2023-12-11 18:11:34 -05:00
Mai	bdd28f1f26	Merge pull request #12378 from JosJuice/jitarm64-a-early-discard ... JitArm64: Add additional condition for lmw/stmw a discard	2023-12-10 20:15:57 -05:00
JosJuice	c55f21729f	Add "large entry points map" setting ... To aid in debugging, this makes it possible to disable the recently added 32/64 GiB region which hasn't had a proper name so far.	2023-12-10 21:07:27 +01:00
JosJuice	0ec12f9e7e	JitArm64: Add additional condition for lmw/stmw a discard ... If a is one of the registers that will be loaded/stored, we must not discard it early. Sorry for this fixup of a fixup...	2023-12-10 19:13:35 +01:00